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ltc6078/ltc6079 1 60789fa micropower precision, dual/quad cmos rail-to-rail input/output ampli ers the ltc ? 6078/ltc6079 are dual/quad, low offset, low noise operational ampli? ers with low power consumption and rail-to-rail input/output swing. input offset voltage is trimmed to less than 25v and the cmos inputs draw less than 50pa of bias current. the low offset drift, excellent cmrr, and high voltage gain make it a good choice for precision signal conditioning. each ampli? er draws only 54a current on a 3v supply. the micropower, rail-to-rail operation of the ltc6078/ltc6079 is well suited for portable instruments and single supply applications. the ltc6078/ltc6079 are speci? ed on power supply voltages of 3v and 5v from C40 to 125c. the dual am- pli? er ltc6078 is available in 8-lead msop and 10-lead dfn packages. the quad ampli? er ltc6079 is available in 16-lead ssop and dfn packages. photodiode ampli? er high impedance sensor ampli? er microvolt accuracy threshold detection instrumentation ampli? ers battery powered applications maximum offset voltage of 25v (25c) maximum offset drift of 0.7v/c maximum input bias: 1pa (25c) 50pa (85c) micropower: 54a per amp 95db cmrr (min) 100db psrr (min) input noise voltage density: 16nv/hz rail-to-rail inputs and outputs 2.7v to 5.5v operation voltage ltc6078 available in 8-lead msop and 10-lead dfn packages; ltc6079 available in 16-lead ssop and dfn packages thermocouple signal conditioner applicatio s u features descriptio u typical applicatio u , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. patent pending. 1k 5.6pf 0.1 f out = 10mv/ c 0 c to 500 c 0.5 c 5v 5v + 60789 ta01a 2.49m smt 1/4w 150k normally floating omega 5tc-tt-k-30-36 thermocouple amplifier protected to 190v, accidental contact 40.6 v/ c smt 1/4w 150k 10k 100pf k 1/2 ltc6078 lt1025 v os distribution v os ( v) number of amps out of 200 1412 10 6 84 2 0 60789 ta01b ?1 7 ? ? ? 1 5 9 ? ? 3 ltc6078ms8v s = 3v v cm = 0.5v t a = 25 c downloaded from: http:///
ltc6078/ltc6079 2 60789fa total supply voltage (v + to v C ) ...................................6v input voltage ...................................................... v C to v + output short circuit duration (note 2) ............ inde? nite operating temperature range (note 3) ltc6078c, ltc6079c .......................... C40c to 85c ltc6078i, ltc6079i ............................ C40c to 85c ltc6078h, ltc6079h ........................ C40c to 125c (not available in dfn package) (note 1) speci? ed temperature range (note 4) ltc6078c, ltc6079c .............................. 0c to 70c ltc6078i, ltc6079i ............................ C40c to 85c ltc6078h, ltc6079h ........................ C40c to 125c junction temperature dfn packages ................................................... 125c all other packages ............................................ 150c storage temperature range dfn packages .................................... C65c to 125c all other packages ............................. C65c to 150c lead temperature (soldering, 10 sec) .................. 300c absolute axi u rati gs w ww u package/order i for atio uu w top view dd package 10-lead (3mm 3mm) plastic dfn 10 96 7 8 45 3 2 1 v + outb?nb +inb shdn_b outa ?na+ina v shdn_a b a t jmax = 125c, ja = 43c/w underside metal connected to v C 12 3 4 outa ?na+ina v 87 6 5 v + outb?nb +inb top view ms8 package 8-lead plastic msop b a t jmax = 150c, ja = 200c/w order part number dd part marking* ltc6078cdd ltc6078idd lbbblbbb order part number ms8 part marking* ltc6078acms8 ltc6078cms8 ltc6078aims8 ltc6078ims8 ltc6078ahms8 ltc6078hms8 ltajz ltajz ltajz ltajz ltajz ltajz 1615 14 13 12 11 10 9 12 3 4 5 6 7 8 outd?nd +ind v +inc?nc outc nc outa ?na+ina v + +inb?nb outb nc top view dhc package 16-lead (5mm 3mm) plastic dfn d a c b t jmax = 125c, ja = 43c/w underside metal connected to v C gn package 16-lead plastic ssop 12 3 4 5 6 7 8 top view 1615 14 13 12 11 10 9 outa ?na+ina v + +inb?nb outb nc outd?nd +ind v +inc?nc outc nc d a c b t jmax = 150c, ja = 110c/w order part number dhc part marking* ltc6079cdhc ltc6079idhc 60796079 order part number gn part marking ltc6079cgn ltc6079ign LTC6079HGN 60796079i 6079h order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grades and parametric grades are identi? ed by a label on the shipping container. downloaded from: http:///
ltc6078/ltc6079 3 60789fa the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. test conditions are v + = 3v, v C = 0v, v cm = 0.5v unless otherwise noted. symbol para meter conditions c, i suffixes h suffix units min typ max min typ max v os offset voltage (note 5) ltc6078ms8, ltc6078ams8, ltc6079gn v cm = 0.5v, 2.5v ltc6078dd, ltc6079dhc v cm = 0.5v, 2.5v ltc6078ams8 v cm = 0.5v ltc6078ms8 v cm = 0.5v ltc6079gn v cm = 0.5v ltc6078dd v cm = 0.5v ltc6079dhc v cm = 0.5v 77 2025 30 30 35 2530 70 97 115120 150 7 2530 35 2595 135165 vv v v v v v v os ? t input offset voltage drift (note 5) ltc6078ams8 ltc6078ms8 ltc6078dd, ltc6079gn ltc6079dhc 0.20.3 0.3 0.71.1 1.4 1.8 0.20.3 0.71.1 1.4 v/cv/c v/c v/c i b input bias current(note 6) v cm = v + /2 v cm = v + /2 0.2 10 1 50 0.2 150 1 350 papa i os input offset current(note 6) v cm = v + /2 v cm = v + /2 0.1 0.5 25 0.1 10 100 papa e n input noise voltage 0.1hz to 10hz 1 1 v p-p input noise voltage density f = 1khz f = 10khz 1816 1816 nv/hznv/hz i n input noise current density(note 8) 0.56 0.56 fa/hz input common mode range v C v + v C v + v c diff differential input capacitance 10 10 pf c cm common mode input capacitance 18 18 pf cmrr common mode rejection ratio all packages v cm = 0v to 3v ltc6078ams8 v cm = 0v to 3v ltc6078ams8 v cm = 0v to 1.7v ltc6078ms8 v cm = 0v to 3v ltc6078ms8 v cm = 0v to 1.7v ltc6079gn v cm = 0v to 3v ltc6079gn v cm = 0v to 1.7v ltc6078dd, ltc6079dhc v cm = 0v to 3v ltc6078dd, ltc6079dhc v cm = 0v to 1.7v 9587 91 85 89 84 88 83 87 110105 103 102 102 102 102 100 102 9587 91 85 89 84 88 110103 103 100 102 100 102 dbdb db db db db db db db psrr power supply rejection ratio v s = 2.7v to 5.5v 100 97 120 100 97 120 db db v out output voltage, high (referred to v + ) no loadi source = 0.2ma i source = 2ma 35 350 1 15 150 40 400 1 15 150 mvmv mv output voltage, low (referred to v C ) no loadi sink = 0.2ma i sink = 2ma 1 10 100 30 300 1 10 100 35 350 mvmv mv a vol large-signal voltage gain r load = 10k, 0.5v v out 2.5v 115 130 110 125 db i sc output short-circuit current source sink 57 1014 46 1014 mama sr slew rate a v = 1 0.05 0.05 v/s gbw gain-bandwidth product (f test = 10khz) r l = 100k 420360 750 420 320 750 khz khz 0 phase margin r l = 10k, c l = 200pf 66 66 deg t s settling time 0.1% a v = 1, 1v step 24 24 s electrical characteristics downloaded from: http:///
ltc6078/ltc6079 4 60789fa electrical characteristics the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. test conditions are v + = 3v, v C = 0v, v cm = 0.5v unless otherwise noted. symbol para meter conditions c, i suffixes h suffix units min typ max min typ max i s supply current (per ampli? er) no load 54 72 78 54 72 80 aa shutdown current (per ampli? er) shutdown, v shdn 0.8v, ltc6078dd 0.3 1 a v s supply voltage range guaranteed by the psrr test 2.7 5.5 2.7 5.5 v channel separation f s = 10khz, r l = 10k C110 C110 db shutdown logic shdn high, ltc6078dd shdn low, ltc6078dd 2 0.8 2 0.8 vv t on turn on time v shdn = 0.8v to 2v, ltc6078dd 50 50 s t off turn off time v shdn = 2v to 0.8v, ltc6078dd 2 2 s leakage of shdn pin v shdn = 0v, ltc6078dd 0.6 a the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. test conditions are v + = 5v, v C = 0v, v cm = 0.5v unless otherwise noted. symbol parameter conditions c, i suffixes h suffix units min typ max min typ max v os offset voltage ltc6078ms8, ltc6078ams8, ltc6079gn v cm = 0.5v ltc6078dd, ltc6079dhc v cm = 0.5v ltc6078ams8 v cm = 0.5v ltc6078ms8 v cm = 0.5v ltc6079gn v cm = 0.5v ltc6078dd v cm = 0.5v ltc6079dhc v cm = 0.5v 1010 20 25 30 30 35 3035 75 102120 125 155 1025 30 35 30 100140 170 vv v v v v v v os ? t input offset voltage drift (note 7) ltc6078ams8 ltc6078ms8 ltc6078dd, ltc6079gn ltc6079dhc 0.20.3 0.3 0.71.1 1.4 1.8 0.20.3 0.71.1 1.4 v/cv/c v/c v/c i b input bias current v cm = v + /2 v cm = v + /2 0.2 10 1 50 0.2 150 1 350 papa i os input offset current v cm = v + /2 v cm = v + /2 0.1 0.5 25 0.1 10 100 papa e n input noise voltage 0.1hz to 10hz 1 1 v p-p input noise voltage density f = 1khz f = 10khz 1816 1816 nv/hznv/hz i n input noise current density(note 8) 0.56 0.56 fa/hz input common mode range v C v + v C v + v c diff differential input capacitance 10 10 pf c cm common mode input capacitance 18 18 pf downloaded from: http:///
ltc6078/ltc6079 5 60789fa note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: a heat sink may be required to keep the junction temperature below the absolute maximum. this depends on the power supply voltage and how many ampli? ers are shorted. note 3: the ltc6078c/ltc6079c and ltc6078i/ltc6079i are guaranteed functional over the operating temperature range of C40c to 85c. the ltc6078h/ltc6079h are guaranteed functional over the operating temperature range of C40c to 125c. note 4: the ltc6078c/ltc6079c are guaranteed to meet speci? ed symbol parameter conditions c, i suffixes h suffix units min typ max min typ max cmrr common mode rejection ratio all packages v cm = 0v to 5v ltc6078ams8 v cm = 0v to 5v ltc6078ams8 v cm = 0v to 3.7v ltc6078ms8 v cm = 0v to 5v ltc6078ms8 v cm = 0v to 3.7v ltc6079gn v cm = 0v to 5v ltc6079gn v cm = 0v to 3.7v ltc6078dd, ltc6079dhc v cm = 0v to 5v ltc6078dd, ltc6079dhc v cm = 0v to 3.7v 9190 94 88 90 86 90 86 90 105105 105 100 105 100 105 100 105 9190 94 88 90 86 90 105105 105 100 105 100 105 dbdb db db db db db db db psrr power supply rejection ratio v s = 2.7v to 5.5v 100 97 120 97 120 db db v out output voltage, high (referred to v + ) no loadi source = 0.5ma i source = 5ma 50 500 2 20 200 55 550 2 20 200 mvmv mv output voltage, low (referred to v C ) no loadi sink = 0.5ma i sink = 5ma 1 15 150 40 400 1 15 150 45 450 mvmv mv a vol large-signal voltage gain r load = 10k, 0.5v v out 4.5v 115 130 110 125 db i sc output short-circuit current source sink 1414 2525 1212 2525 mama sr slew rate a v = 1 0.05 0.05 v/s gbw gain-bandwidth product (f test = 10khz) r l = 100k 420360 750 420 320 750 khz khz 0 phase margin r l = 10k, c l = 200pf 66 66 deg t s settling time 0.1% a v = 1, 1v step 24 24 s i s supply current (per ampli? er) no load 55 74 82 55 74 84 aa shutdown current (per ampli? er) shutdown, v shdn 1.2v, ltc6078dd 1.5 5 1.5 5 a v s supply voltage range guaranteed by the psrr test 2.7 5.5 2.7 5.5 v channel separation f s = 10khz, r l = 10k C110 C110 db shutdown logic shdn high, ltc6078dd shdn low, ltc6078dd 3.5 1.2 3.5 1.2 vv t on turn on time v shdn = 1.2v to 3.5v, ltc6078dd 50 50 s t off turn off time v shdn = 1.2v to 3.5v, ltc6078dd 2 2 s leakage of shdn pin v shdn = 0v, ltc6078dd 0.6 a performance from 0c to 70c. the ltc6078c/ltc6079c are designed, characterized and expected to meet speci? ed performance from C40c to 85c but are not tested or qa sampled at these temperatures. the ltc6078i/ltc6079i are guaranteed to meet speci? ed performance from C40c to 85c. the ltc6078h/ltc6079h are guaranteed to meet speci? ed performance from C40c to 125c. note 5: v os and v os drift are 100% tested at 25c and 125c. note 6: i b and i os are guaranteed by the v s = 5v test. note 7: v os drift is guaranteed by the v s = 3v test. note 8: current noise is calculated from i n = 2qi b , where q = 1.6 ? 10 C19 coulomb. electrical characteristics the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. test conditions are v + = 5v, v C = 0v, v cm = 0.5v unless otherwise noted. downloaded from: http:///
ltc6078/ltc6079 6 60789fa number of amps out of 200 1412 10 6 84 2 0 60789 g01 ?1 7 ? ? ? 1 5 9 ? ? 3 v os ( v) ltc6078ms8v s = 3v v cm = 0.5v t a = 25 c time (5s/div) 60789 g09 v s = 5v v cm = 0.5v voltage noise (500nv/div) v cm (v) 0 input bias current (pa) 400300 200 100 ? ?00?00 ?00 ?00 4 1 2 3 5 60789 g07 v s = 5v t a = 125 c frequency (hz) noise voltage (nv/ hz) 9080 70 60 50 40 30 20 10 0 1 100 1k 100k 60789 g08 10 10k v s = 5v v cm = 0.5v v s = 3v v cm = 0.5v temperature ( c) 0 input bias current (pa) 180160 140 100 120 20 40 60 80 0 100 60789 g05 25 50 75 125 v s = 5v v cm = 2.5v v cm (v) 0 input bias current (pa) 3024 18 12 6 ?? ?2?8 ?4 ?0 4 1 2 3 5 60789 g06 v s = 5v t a = 70 c t a = 85 c v/ c number of amps out of 200 5045 40 30 3525 20 15 10 50 60789 g04 ?.8 0.6 ?.6 ?.4 0 0.4 0.8 ?.2 0.2 ltc6078ms8v s = 3v v cm = 0.5v t a = ?0 c to 125 c v cm (v) 0 v os ( v) 1.5 2.5 60789 g03 0.5 1.0 2.0 3.5 4.5 4.0 100 4020 8060 0 ?0 ?00 ?0?0 ?0 5.0 3.0 v s = 5v t a = 25 c representative parts v cm (v) 0 v os ( v) 1.5 2.5 60789 g02 0.5 1.0 2.0 4030 20 10 0 ?0?0 ?0 ?0 3.0 v s = 3v t a = 25 c representative parts v os drift distribution input bias vs temperature input bias vs v cm input bias vs v cm voltage noise spectrum 0.1hz to 10hz output voltage noise v os distribution v os vs v cm v os vs v cm typical perfor a ce characteristics uw downloaded from: http:///
ltc6078/ltc6079 7 60789fa 20 s/div 60789 g17 20mv/div v s = 5v r l = 10k c l = 100pf 200 s/div 60789 g18 1v/div v s = 5v r l = 10k c l = 100pf frequency (hz) output impedance ( ? ) 10000 1000 100 10 1 0.1 0.01 100 100k 1m 60789 g16 10k 1k v s = 5v v cm = 0.5v t a = 25 c a v = 100 a v = 10 a v = 1 frequency (hz) psrr (db) 140120 80 100 6040 20 0 1 10 100 10k 100k 10m 60789 g15 1k 1m v s = 5v v cm = 0.5v t a = 25 c frequency (hz) 100 8060 40 20 0 ?0?0 1k 100k 1m 10m 60789 g13 10k gain (db) 10080 60 40 20 0 ?0 ?0 phase (deg) v s = 5v v cm = 0.5v c l = 200pf t a = 25 c r l = 10k r l = 100k gain phase load current (ma) output voltage swing (v) (referred to supply voltage) +v s +v s ?.5 +v s ?.0 +v s ?.5 +v s ?.0 ? s +2.0 ? s +1.5 ? s +1.0 ? s +0.5 ? s 0.01 1 10 100 60789 g10 0.1 v s = 5v v cm = 0.7v source sink t a = 125 c t a = 25 c t a = ?5 c supply voltage (v) 0 0.5 supply current ( a) 1.0 3.0 4.0 60789 g11 2.5 5.0 5.5 1.5 2.0 3.5 4.5 6050 40 30 20 10 0 per amplifierv cm = 0.5v t a = 25 c temperature ( c) ?0 ?5 supply current ( a) ?0 50 80 60789 g12 35 110 125 520 65 95 6550 6045 5540 per amplifierv cm = 0.5v v s = 5v v s = 3v frequency (hz) cmrr (db) 120 80 100 6040 20 0 ?0 100 10k 100k 10m 60789 g14 1k 1m v s = 5v v cm = 0.5v t a = 25 c r l = 1k open loop gain vs frequency cmrr vs frequency psrr vs frequency output impedance vs frequency small signal transient large signal transient output voltage swing vs load current supply current vs supply voltage supply current vs temperature typical perfor a ce characteristics uw downloaded from: http:///
ltc6078/ltc6079 8 60789fa capacitive load (pf) 10 overshoot (%) 5045 40 35 30 25 20 15 10 50 100 1000 60789 g20 v s = 5v v cm = 0.5v t a = 25 c a v = 10 a v = 1 frequency (hz) 100 output impedance (k ? ) 60789 g19 1k 10k 100k 1m 10m 1000 100 10 1 0.1 0.01 v s = 5v v cm = 0.5v t a = 25 c a v = 1 frequency (hz) 100 1k 10k 100k 1m 10m channel separation (db) 60789 g21 ?00?05 ?10 ?15 ?20 ?25 ?30 ?35 v s = 5v v cm = 0.5v r l = 10k typical perfor a ce characteristics uw disabled output impedence vs frequency overshoot vs c l pi fu ctio s uuu channel separation vs frequency out: ampli? er output Cin: inverting input +in: noninverting input v+: positive supply vC: negative supply ? s ? h ? d ? n ? _ ? a: shutdown pin of ampli? er a, active low and only valid for ltc6078dd. an internal current source pulls the pin to v + when ? oating. ? s ? h ? d ? n ? _ ? b: shutdown pin of ampli? er b, active low and only valid for ltc6078dd. an internal current source pulls the pin to v + when ? oating. nc: not internally connected. exposed pad: connected to v C . downloaded from: http:///
ltc6078/ltc6079 9 60789fa figure 1. op amp with input voltage clamp preserving input precision preserving input accuracy of the ltc6078/ltc6079 re- quires that the application circuit and pc board layout do not introduce errors comparable or greater than the 10v typical offset of the ampli? ers. temperature differentials across the input connections can generate thermocouple voltages of 10s of microvolts so the connections to the input leads should be short, close together and away from heat dissipating components. air current across the board can also generate temperature differentials. the extremely low input bias currents (0.2pa typical) al- low high accuracy to be maintained with high impedance sources and feedback resistors. leakage currents on the pc board can be higher than the input bias current. for example, 10g of leakage between a 5v supply lead and an input lead will generate 500pa! surround the input leads with a guard ring driven to the same potential as the input common mode to avoid excessive leakage in high impedance applications. input clamps large differential voltages across the inputs over very long time periods can impact the precisely trimmed input offset voltage of the ltc6078/ltc6079. as an example, a 2v differential voltage between the inputs over a period of 100 hours can shift the input offset voltage by tens of microvolts. if the ampli? er is to be subjected to large differential input voltages, adding back-to-back diodes between the two inputs will minimize this shift and retain the dc precision. if necessary, current-limiting series resistors can be added in front of the diodes, as shown in figure 1. these diodes are not necessary for normal closed loop applications. + 500 ? 500 ? 60789 f01 applicatio s i for atio wu u u capacitive load ltc6078/ltc6079 can drive capactive load up to 200pf in unity gain. the capacitive load driving capability increases as the ampli? er is used in higher gain con? gurations. a small series resistance between the ouput and the load further increases the amount of capacitance the ampli? er can drive. ? s ? h ? d ? n pins pins 5 and 6 are used for power shutdown on the ltc6078 in the dd package. if they are ? oating, internal current sources pull pins 5 and 6 to v+ and the ampli? ers operate normally. in shutdown, the ampli? er output is high imped- ance, and each ampli? er draws less than 2a current. when the chip is turned on, the supply current per ampli? er is about 35a larger than its normal values for 50s.rail-to-rail input the input stage of ltc6078/ltc6079 combines both pmos and nmos differential pairs, extending its input common mode voltage range to both positive and negative supply voltages. at high input common mode range, the nmos pair is on. at low common mode range, the pmos pair is on. the transition happens when the common voltage is between 1.3v and 0.9v below the positive supply. thermal hysteresis figure 2 shows the input offset hysteresis of ltc6078ms8 for 3 thermal cycles from C45c to 90c. the typical offset shift after the 3 cycles is only 1v. figure 2. v os thermal hysteresis of ltc6078ms8 v os change from initial value number of amplifiers 5045 40 35 30 25 20 15 10 50 60789 f02 ? 5 ? ? ? ? 2 4 6 01 3 v s = 3v v cm = 0.5v 1st cycle2nd cycle 3rd cycle downloaded from: http:///
ltc6078/ltc6079 10 60789fa applicatio s i for atio wu u u pc board layoutmechanical stress on a pc board and soldering-induced stress can cause the v os and v os drift to shift. the dd and dhc packages are more sensitive to stress. a simple way to reduce the stress-related shifts is to mount the ic near the short edge of the pc board, or in a corner. the board edge acts as a stress boundary, or a region where the ? exure of the board is minimum. the package should always be mounted so that the leads absorb the stress and not the package. the package is generally aligned with the leads paralled to the long side of the pc board. the most effective technique to relieve the pc board stress is to cut slots in the board around the op amp. these slots can be cut on three sides of the ic and the leads can exit on the fourth side. figure 3 shows the layout of a ltc6078dd with slots at three sides. figure 3. vertical orientation of ltc6078dd with slots 60789 f03 long dimension slots simpli? ed schematic of the ampli? er r1 r2 r3 v + v r4 + d8 d7 out m8m9 c1c2 60789 ss v + v d5 d6 + output control m4 m6 a1a2 m7 m5 i1 v bias m1 m2 m3 ?n v + v v + v d3 d4 +in v m11 m10 1 a i2 v + v d1 d2 shdn bias generation note: shdn is only available in the dfn10 package sche atic w w si plified downloaded from: http:///
ltc6078/ltc6079 11 60789fa ?.5v 1m 1000pf v out 2.5v + 60789 ta04 columbia research labs 3021 accelerator v out = 60mv/g where g = earth's gravitational constant 1/2 ltc6078 ?.5v 1m 3.8pf v out 2.5v + 60789 ta05 temd1000ir photodiode at 870nm (ir),v out = 600mv/ w received power 1/2 ltc6078 + 2n7002 hsdl-4220 v dd v dd 60789 ta03 100k 909k 5v0v 49.9 ? on/off shdn varying on duty cycle reduces average power consumption 1/2 ltc6078 + 2n7002 v dd i l v dd 60789 ta02 r s r2 r1 load v out = i l ? r2 ?r s ?v os ? r2 r1 r1 0v v out v dd ?v gs, mosfet v out 1/2 ltc6078 typical applicatio s u 2.7v high side current sense low average power ir led driver accelerometer signal conditioner photodiode ampli? er downloaded from: http:///
ltc6078/ltc6079 12 60789fa typical applicatio s u 6 decade current log ampli? er 60789 ta07 v dd v cc 133k 100k q1 1000pf v out 1 f 10na i in 10ma q1, q2: diodes inc. dmmt3906wa to d: ltc6079 v out 150mv ?log (i in ) + 1.23v, i in in amps precision resistor pt146 1k +3500ppm/ c 100 ? 1.58k + d + b + c + a 1 f q2 33 f i in 100 ? gnd lt6650 in out humidity sensor signal conditioner 60789 ta08 v dd v out 0v to 5v0% to 100% rh 34.8k 49.9k 499k 1k 10k 47.5k 1k 100k v dd v dd v dd v sup 5.2v to 20v v dd 5v 1 f 0.01 f 0.1 f bat54s 1 f in out shdn lt1761-5 byp v dd out set div grd gnd 100k offset trim gain trim 49.9k m1 v dd v bias 100k 100k a to c: ltc6079h: ge parametrics g-cap 2 humidity sensor 148pf to 178pf, 0% to 90% rh m1: vn2222l 1000pf 75pf h + c + b + a 1m 100k 0.1 f ltc6906 v bias downloaded from: http:///
ltc6078/ltc6079 13 60789fa typical applicatio s u ldo load balancing v dd 60789 ta09 1k v in 1.8v to 20v 10 f 0.01 f 0.1 f 10 f load i load in out shdn lt1763 byp fb + a r1 2k r2 2k 0 i load 1.5a 1.22v v out v dd ldo loads match to within 1ma with 10m ? of ballast resistance (2 inches of awg 28 gauge stranded wire) a, b: ltc6078 ballast resistance:identical length thermally mated wire or pcb trace + 10 f 0.01 f in out shdn lt1763 byp fb 2k 10k 2k 100 ? 1k 0.1 f 10 f 0.01 f in out shdn lt1763 byp fb 2k 10k 2k 100 ? + b r2 r1 v out = 1.22v 1 + ?? ? ?? ? ph probe ampli? er 60789 ta10 v cc 1k v out 1000pf sensor: sensorex s200c ph probeltc6078 input impedance 1t ? or greater v out = 1.25v + 59.2mv ?(ph ?7) a, b: ltc6078 precision resistor pt146 1k +3500ppm/ c 57.6k + b lt16341.25v ph + a downloaded from: http:///
ltc6078/ltc6079 14 60789fa typical applicatio s u precision sample-and-hold thermistor ampli? er with overtemperature alarm 60789 ta12 v out t ov 100k 100k 29.4k 100k 0.01 f 50k 178k 71.5k a to d: ltc6079, v dd = 2.7v to 5.5v, v ss = gnd v out = 0 1v for 0 c to 100 c, linear t ov high when t 90 c ysi #44201 thermolinear network + c + b + d + a 3200 ? 200k h 6250 ? b v dd 1k lt16341.25v gain trim 20k 143k offset trim 60789 ta13 v out v in v dd 0.1 f 9 6 i supply < 200 a voltage droop = 130nv/ms typslew rate = 0.05v/ms typ acq time = 84 s typ to 0.1% s/h + ltc6078 a ltc6943 14 + ltc6078 b 7 1 5 4 downloaded from: http:///
ltc6078/ltc6079 15 60789fa typical applicatio s u precision voltage-controlled current source 60hz notch 60789 ta14 i out v in v dd 1 f 1 f i out = v in r set + 14 ltc6943 15 0.68 f 0.001 f 1k r set 1k 9 67 10 11 12 i error < 0.1% at i out = 1 a 1/2 ltc6078 2.5v ?.5v 60789 ta15 v in v out r2 r1 10m 10m 540pf 5m 270pf 270pf + notch depth = ?0db at 60hz, rti v out = 1 + ?v in r2r1 () 1/2 ltc6078 downloaded from: http:///
ltc6078/ltc6079 16 60789fa dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699) package descriptio u 3.00 0.10 (4 sides) note:1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the ltc website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.38 0.10 bottom view?xposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 ?0.05 (dd10) dfn 1103 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50bsc 0.675 0.05 3.50 0.05 packageoutline 0.25 0.05 0.50 bsc downloaded from: http:///
ltc6078/ltc6079 17 60789fa package descriptio u 3.00 0.10 (2 sides) 5.00 0.10 (2 sides) note:1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?xposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.20 typ 4.40 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 ?0.05 (dhc16) dfn 1103 0.25 0.05 pin 1notch 0.50 bsc 4.40 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.20 0.05 0.50 bsc 0.65 0.05 3.50 0.05 packageoutline 0.25 0.05 dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1706) downloaded from: http:///
ltc6078/ltc6079 18 60789fa package descriptio u msop (ms8) 0204 0.53 0.152 (.021 .006) seating plane note:1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ?0.38 (.009 ?.015) typ 0.127 0.076 (.005 .003) 0.86 (.034) ref 0.65 (.0256) bsc 0 ?6 typ detail ? detail ? gauge plane 12 3 4 4.90 0.152 (.193 .006) 8 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 ?3.45 (.126 ?.136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660) downloaded from: http:///
ltc6078/ltc6079 19 60789fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 ?.244 (5.817 ?6.198) .150 ?.157** (3.810 ?3.988) 16 15 14 13 .189 ?.196* (4.801 ?4.978) 12 11 10 9 .016 ?.050 (0.406 ?1.270) .015 .004 (0.38 0.10) 45 0 ?8 typ .007 ?.0098 (0.178 ?0.249) .0532 ?.0688 (1.35 ?1.75) .008 ?.012 (0.203 ?0.305) typ .004 ?.0098 (0.102 ?0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 ?.165 .0250 bsc .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note:1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) package descriptio u downloaded from: http:///
ltc6078/ltc6079 20 60789fa ? linear technology corporation 2005 lt 0506 rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com part number description comments ltc2051/ltc2052 dual/quad zero-drift op amps 3v v os , 30nv/c v os drift lt6011/lt6012 dual/quad precision op amps 60v v os , i b = 300pa, i s = 135a typical applicatio u related parts dc accurate composite ampli? er, gain of 1000 v ee 10k v out v in v cc v ee v cc v dd lt1634bcs8-5 + 60789 ta06 100 ? 10 ? 10 ? 10k v ss 2.49k 2.49k circuit bw 1.25mhz e n = 2.6nv/ hz (rti) at 1khz circuit v os = 25 v (max) rti 1m v ss 0.1 f v dd + lt1226 1/2 ltc6078 downloaded from: http:///

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